Join our team at Apple developing the always-on SoC’s that are at the heart of all of Apple’s major hardware products. You will be responsible for creating the digital IP’s for Apple’s system management and power conversion IC’s. You will work closely with Apple’s product teams and system architects in setting the block level specifications and then implementing the designs. You will own the creation of the blocks, taking them through the concept, implementation, and physical design steps, and then into mass production.
The team creates both digital-only and mixed signal IP’s and integrates them into stand alone system control IC’s. The mixed signal IP’s include industry leading power conversion and telemetry blocks developed in close collaboration with the analog design team.
We have a close-knit, prolific team looking to add enthusiastic digital design engineers to develop the new IP’s required for our next generation system control IC’s, which will be designed into all of Apple’s current and future hardware products. We pride ourselves for being an especially diverse team that values new approaches to deliver creativity, high productivity, and industry leading results. Join us in creating the “surprise and delight” in Apple’s next generation of products.
Description
You will have the responsibilities as follows:
- Deliver complex digital IP’s, meeting schedule, area, power, and performance targets.
- Collaborate in developing precise design specifications for digital control blocks.
- Implement physical design ready blocks in System Verilog.
- Collaborate with project leads to track progress and gauge tapeout readiness.
- Work with DV teams to create verification plans and debug test failures.
- Work with silicon validation team in developing lab validation and qualification plans.
Minimum Qualifications
BS and a minimum of 10 years of relevant industry experience.
Preferred Qualifications
5+ years of experience developing digital IP’s for SoC’s or mixed signal IC’s.
Proven track record of delivering quality designs on schedule.
Experience with synthesis, static timing, and logical equivalence tools.
Expertise in Clock Domain Crossing design and verification techniques.
Familiarity with power estimation tools and techniques.
Familiarity with digital ASIC development and integration flows, and milestone tracking.
Solid understanding of low power design techniques.
Eeo Content
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
