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Home›Jobs›Google›Senior SoC and IP Design Engineer, Google Cloud
Google

About Google

Empowering the world through technology and information

🏢 Tech👥 100K+📅 Founded 1998📍 Mountain View, California, United States

Key Highlights

  • Over 100,000 employees globally
  • Headquartered in Mountain View, California
  • Parent company Alphabet Inc. valued at $1.5 trillion
  • Google Cloud Platform serves millions of customers

Google LLC, headquartered in Mountain View, California, is a global leader in internet-related services and products, including its flagship search engine, Google Search, and the Android operating system. With over 100,000 employees, Google also offers cloud computing services through Google Cloud P...

🎁 Benefits

Google offers competitive salaries, equity options, generous PTO policies, comprehensive health benefits, and a remote work policy that allows flexibi...

🌟 Culture

Google is known for its engineering-first culture, emphasizing innovation and collaboration. The company fosters a unique environment that encourages ...

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Google

Senior SoC and IP Design Engineer, Google Cloud

Google • Haifa, Israel, Tel Aviv, Israel

Posted 2d agoSeniorHardware engineer📍 Haifa📍 Tel aviv
Apply Now →

Skills & Technologies

VerilogSystemverilogRtlFpgaSoc

Overview

Google is seeking a Senior SoC and IP Design Engineer to develop custom silicon solutions for their cloud products. You'll work with Verilog, SystemVerilog, and FPGA technologies. This role requires 8+ years of experience in digital logic design and RTL coding.

Job Description

Who you are

You have a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. With 8 years of experience in digital logic design principles, you are well-versed in RTL design concepts and languages such as Verilog and SystemVerilog. Your expertise includes logic synthesis techniques to optimize RTL code for performance and power, as well as low-power design techniques. You are familiar with design sign-off and quality tools like Lint and CDC, and have experience with SoC or IP architecture. A Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science is preferred, along with knowledge of high-performance and low-power design techniques, assertion-based formal verification, and FPGA and emulation platforms. You possess excellent problem-solving and debugging skills, and you are eager to be part of a team that pushes boundaries in developing innovative hardware solutions.

What you'll do

In this role, you will contribute to the innovation behind products loved by millions worldwide, shaping the next generation of hardware experiences that deliver unparalleled performance, efficiency, and integration. You will perform Register-Transfer Level (RTL) coding, debugging in Verilog and SystemVerilog, and function/performance simulation debugging. Your responsibilities will include conducting Lint, CDC, FV, and UPF checks, participating in synthesis, and engaging in timing and power closure activities. You will also be involved in test plan and coverage analysis for block and SoC-level verification. Collaboration is key, as you will communicate and work with multi-disciplined and multi-site teams to ensure the success of your projects.

What we offer

At Google, you will be part of a dynamic team that is redefining what’s possible in AI and Infrastructure. We empower our customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale and efficiency. You will have the opportunity to work on cutting-edge technology that impacts the future of our direct-to-consumer products. We encourage you to apply even if your experience doesn't match every requirement, as we value diverse perspectives and backgrounds. Join us in our mission to innovate and create solutions that enhance the user experience across the globe.

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