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Home›Jobs›Google›ASIC RTL Design Lead, Silicon
Google

About Google

Empowering the world through technology and information

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Key Highlights

  • Over 100,000 employees globally
  • Headquartered in Mountain View, California
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Google LLC, headquartered in Mountain View, California, is a global leader in internet-related services and products, including its flagship search engine, Google Search, and the Android operating system. With over 100,000 employees, Google also offers cloud computing services through Google Cloud P...

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Google is known for its engineering-first culture, emphasizing innovation and collaboration. The company fosters a unique environment that encourages ...

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Google

ASIC RTL Design Lead, Silicon

Google • Bengaluru, Karnataka, India

Posted 2d ago🏛️ On-SiteLeadHardware engineer📍 Bengaluru
Apply Now →

Skills & Technologies

VerilogSystemverilogPerlPython

Overview

Google is seeking a Lead ASIC RTL Design Engineer to develop custom silicon solutions. You'll work with Verilog, SystemVerilog, and optimization techniques to enhance performance and power efficiency. This role requires 8+ years of experience in digital logic design.

Job Description

Who you are

You have a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. With 8 years of experience in digital logic design principles and RTL design concepts, you are well-versed in languages such as Verilog and SystemVerilog. Your expertise extends to logic synthesis techniques aimed at optimizing RTL code for performance and power, as well as low-power design techniques. You are familiar with scripting languages like Perl or Python, which you have used to enhance your design processes. Your knowledge spans various areas including Process Cores, Interconnects, Debug and Trace, Security, Interrupts, Clocks/Reset, Power/Voltage Domains, and Pin-muxing. You are passionate about pushing boundaries and developing innovative silicon solutions that power the future of technology.

Desirable

A Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science would be a plus. Experience with integration, function/performance simulation debug, Lint, Clock Domain Crossing (CDC), Formal Verification (FV), and Unified Power Format (UPF) checks is highly desirable. You are adept at utilizing key design collaterals, specifically Synopsys Design Constraints (SDC) and Unified Power Format (UPF), while collaborating with stakeholders to discuss quality standards and develop technical workarounds for integration issues.

What you'll do

In this role, you will lead a team focused on designing and developing custom silicon solutions that enhance Google's direct-to-consumer products. You will contribute to the innovation behind products loved by millions worldwide, shaping the next generation of hardware experiences. Your responsibilities will include defining integration processes, conducting function and performance simulations, and debugging designs to ensure high-quality outputs. You will work closely with cross-functional teams to ensure that the silicon solutions meet performance, efficiency, and integration standards. You will also mentor junior engineers, sharing your knowledge and expertise to foster their growth within the team. Your role will involve collaborating with various stakeholders to address integration challenges and ensure that the final products align with Google's high standards.

What we offer

At Google, you will be part of a dynamic team that is at the forefront of technology innovation. We offer competitive compensation and benefits, including opportunities for professional development and career advancement. You will work in a collaborative environment that encourages creativity and innovation, allowing you to make a significant impact on the future of technology. We believe in fostering a diverse and inclusive workplace where every team member can thrive. Join us in shaping the future of hardware experiences that enhance the lives of users around the globe.

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