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Apple’s Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level implementation.
Description
As a CPU Implementation Engineer, you will drive or participate in the following:
• Work with micro-architects to help define the micro-architecture and assist with design feasibility and power, performance, and area (PPA) trade-offs
• Drive RTL-to-GDS design convergence through microarchitecture and logic (RTL) optimizations using synthesis and place-and-route tools targeting ambitious goals for PPA
• Responsible for block-level design delivery along with closure of backend flows, electrical requirements, and improving silicon yield
• Work closely with internal CAD and PD methodology teams on industry-standard synthesis/PNR tool features and optimizations and their adoption in CPU design
• Work with x-functional top-level teams on the aspects of CPU floorplan, timing, power, reliability, and testability
• Work closely with custom IP teams to define and co-optimize memory macros, library standard cells to improve design PPA
Minimum Qualifications
Minimum BS
Experience in TCL or Perl
Preferred Qualifications
Logic design and digital circuits knowledge
Familiarity with high performance CPU microprocessor architecture
Experience in using industry standard logic Synthesis, PnR, STA and Power analysis tools, along with floor-planning, pin-placement and timing budgeting
Ability to work well in a team, self-motivated, and excellent communication skills
Eeo Content
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