Silicon Photonics & Optical Packaging Eng

Silicon photonics (SiPh) technology is essential for realizing next-generation optical interconnects already implemented in data center connectivity and ready to penetrating into short distance within the boards. One critical technology to realize high-volume, low-cost SiPh optical interconnect applications is the development of high efficient optical I/O module architecture, assembly, optical coupling design and process for single-mode fiber packaging. We are looking for a hardworking and passionate Si photonics & optical Packaging Engineer to join our team. In this highly visible role, you will develop Si photonics engine/chiplet packaging and co-packaging solutions utilizing advanced packaging technologies, define assembly baseline processes, decide package BOM, establish optical coupling design/manufacturing that are optimized for performance, reliability, yield and cost.

Description

Responsible to lead Si photonics packaging technology development. Work with cross functional team and lead optical engine module, optical coupling design/fiber array connector and co-packaging optics development efforts. Si photonics based optical engine package architecture / Package integration and drive micro-optical component assembly/interface characterization through Innovation Work with optical component vendors, foundry and OSAT to bring Si photonics packaging solution from concept to HVM. Minimum 5% International travel.

Minimum Qualifications

BS and 3+ years of relevant industry experience.

Preferred Qualifications

M.S or Ph.D. in Physic (Optics major), Electrical Engineering, Materials Science, Mechanical Engineering or an equivalent field desired, preferred. Excellent teamwork and communication skills. Strong theoretical background in optics and photonics fundamentals, device/module integration. Hands-on experience in packaging and measuring fiber-coupled devices. Hands-on experience in optical component design, simulation and qualification, and single / multi-mode fiber assembly using active and passive alignment tool. Min. 5 years works experiences in the related field with M.S and or Ph.D. Hands-on experience of CMOS BEOL wafer scale processing and flip chip assembly (CoC, CoW, WLP, …) Experience with silicon photonics device laser, modulator, PD, passive components, such as, Si WG, MUX/DeMUX is a plus.

Responsibilities

Design and model silicon photonic devices and optical interconnects, optimizing coupling, thermal, and signal integrity performance. Develop and simulate optical packaging architectures integrating photonic chips, fibers, and electronics using tools like Lumerical, Zemax, or COMSOL. Prototype and characterize integrated photonic packages, correlating simulation with optical and electrical measurements. Collaborate with cross-functional teams (process, electrical, mechanical, reliability) to enable scalable, manufacturable designs. Document results and present technical findings through reports, reviews, or relevant forum presentations contributing to next-generation optical I/O development.

Eeo Content

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.