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Google • Bengaluru, Karnataka, India
Google is seeking a Senior SoC Static Timing Analysis Engineer to develop custom silicon solutions. You'll work with Static Timing Analysis and scripting languages like Python and Perl in Bengaluru. This role requires 8 years of experience in the field.
You have a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. With 8 years of experience in Static Timing Analysis, you are well-versed in constraints development and validation, sign-off corner definitions, and process margining. Your expertise in setting up frequency goals with technology growth and platform development kit (PDK) changes makes you a valuable asset to any team. You also have experience with scripting languages like Perl or Python, which you have used to automate tasks and improve efficiency in your work.
Your educational background may include a Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, showcasing your commitment to advancing your knowledge in the field. You have a strong understanding of developing constraints and validating them using Timing Constraints Manager (e.g., Synopsys) or TimeVision (e.g., Ausdia), which is crucial for ensuring the reliability of silicon designs.
You thrive in collaborative environments and enjoy working with design teams and block owners throughout projects to achieve sign-off timing convergence. Your ability to evaluate multiple timing methodologies and tools across different designs and technology nodes demonstrates your analytical skills and attention to detail. You are also experienced in promoting and demoting constraints flow using tools like fishtail and TimeVision, ensuring that the design meets all necessary requirements.
In this role, you will be part of Google's Silicon team, where you will contribute to the development of hardware and software that enable Google's innovations in Application Specific Integrated Circuits (ASIC). You will drive the complete design constraints development and validation process, working closely with design teams to ensure that all timing requirements are met. Your work will involve evaluating various timing methodologies and tools, allowing you to make informed decisions that impact the overall design process.
You will also be responsible for developing automation scripts within Static Timing Analysis (STA) or tools for methodology development, streamlining processes and enhancing productivity. Your contributions will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. You will have the opportunity to work on projects that push boundaries and develop custom silicon solutions that power the future of Google's direct-to-consumer products.
At Google, you will be part of a team that values innovation and collaboration. You will have the chance to work on cutting-edge technology that impacts millions of users worldwide. We encourage you to apply even if your experience doesn't match every requirement, as we believe diverse teams build better products. You will have access to resources and support that will help you grow in your career, including opportunities for further education and professional development. Join us in shaping the future of technology and making a difference in the world.
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