ASIC Engineer, Networking Architecture and Modeling

As a Networking ASIC Engineer on the Infrastructure Silicon team at Meta, you will play a key role in shaping the networking architecture for leading-edge AI training and inference accelerators. You will work closely with other architecture engineers to define networking architecture specifications and then develop high-fidelity C++ models—including QEMU, NIC, RoCE, and UAL (Ultra Accelerator Link) models—to enable early software development, architecture exploration, and performance analysis. You will collaborate with cross-functional teams working on data center networking architecture, network system design, micro-architecture, RTL design, Design Verification, Firmware/Software development, Pre-Post silicon validation, and Program Management to deliver first-pass functional silicon.