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Home›Jobs›Apple›Mixed-Signal Model Verification Engineer
Apple

About Apple

The personal technology company redefining user experience

🏢 Tech, Hardware👥 1001+ employees📅 Founded 1976📍 Cupertino, CA⭐ 4.2
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Key Highlights

  • Market cap of $3 trillion as of 2022
  • Over 1 billion active devices worldwide
  • Comprehensive medical plans including mental healthcare
  • Paid parental leave and gradual return-to-work program

Apple Inc. (NASDAQ: AAPL), headquartered in Cupertino, CA, is the world's most valuable company with a market capitalization of $3 trillion as of 2022. Known for its iconic products such as the iPhone, iPad, and Mac, Apple serves over 1 billion active devices globally. The company has a strong commi...

🎁 Benefits

Apple offers comprehensive medical plans covering physical and mental healthcare, paid parental leave, and a gradual return-to-work program. Employees...

🌟 Culture

Apple's culture emphasizes an obsessive focus on user experience and consumer privacy, setting it apart from competitors. The company promotes inclusi...

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Apple

Mixed-Signal Model Verification Engineer

Apple • Austin, Texas, United States

Posted 2 months ago🏛️ On-SiteMid-LevelMixed Signal model verification engineer📍 Austin
Apply Now →

Job Description

At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and detail oriented Mixed-signal Behavioral Model Verification Engineer. If you are early in your journey towards a chip design career and wish to challenge yourself in a technical and multi-disciplinary effort, come join the Apple mixed-signal silicon design team. In this position you will build a strong foundation in the working of full custom analog and high-speed digital circuits. You will work with experts in circuit design, behavioral modeling and design verification. You will gain expertise in hybrid simulation methods and various flows used to verify full custom designs.

Description

In this job you will be responsible for verifying mixed-signal behavioral models written in SystemVerilog. The verification process will involve creating self-checking testbenches to simulate models against the circuits they were derived from. It will also involve functional testing of the model against the specification and creating assertions to flag illegal operating conditions. You will additionally help setup and run various static flows like formal logical equivalence, linting, and timing checks. You will also contribute to the streamlining and automation of these flows across mixed-signal design teams.

Minimum Qualifications

Bachelor’s degree with minimum 3 years of relevant experience

Preferred Qualifications

Excellent knowledge of SystemVerilog and Assertions Ability to read custom circuit schematics and understand functionality Solid understanding of logic/SPICE simulations as well as SPICE/HDL co-simulations Excellent knowledge of digital logic gates, clocking and state elements Basics of passive and active circuit elements, voltage and current sources, and analog blocks like amplifiers ADCs/DACs/Comparators Familiarity of writing scripts in PERL/Python is a strong plus Familiarity with formal equivalence and Lint/CDC/RDC tools is a strong plus

Eeo Content

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.

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