SoC DFT Engineer, Google Cloud

Who you are

You have a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. With 5 years of experience in DFT architecture, implementation, and verification for SoCs, you are well-versed in silicon bring-up, debug, or validation of DFT features. Your familiarity with industry-standard test methodologies and platforms, such as ATE, MBIST, JTAG, or System Level Test (SLT), sets you apart. A Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture, is preferred. You bring 10 years of experience in DFT architecture, implementation, and verification for SoCs, along with knowledge of various fault models like Stuck-at, Transition, Cell-Aware, and Path Delay.

You have a strong understanding of DFT flow, including architecture, IP integration, and interaction with synthesis and verification flows. Your experience with industry-leading EDA tools for DFT, such as Synopsys (e.g., Design Compiler, DFT Max) or Siemens EDA (e.g., Tessent, TestKompress), is essential. You are knowledgeable about Test Standards (e.g., IEEE 1149.1, 1687) and Test Data Formats (e.g., BSDL, STIL). You are excited about the opportunity to shape the future of AI/ML hardware acceleration and contribute to the development of custom silicon solutions that power Google's TPU technology.

Desirable

You have experience in developing diagnostic databases, software, and hardware for logic and memory fail debug. Your expertise includes designing and implementing System Level Test strategies and core DFT circuitry, including insertion and hook-up of scan chains, DFT Compression, Logic BIST, TAP controllers, and Memory BIST (MBIST) logic for IP blocks.

What you'll do

In this role, you will work closely with a team to drive cutting-edge TPU technology that powers Google's most demanding AI/ML applications. You will be responsible for shaping the DFT architecture and ensuring high test quality through the implementation of core DFT features. You will collaborate with cross-functional teams to develop and validate DFT methodologies that meet industry standards. Your role will involve debugging and validating DFT features, ensuring that the silicon meets the required specifications.

You will contribute to the innovation of custom silicon solutions, pushing boundaries in the field of AI/ML hardware. Your responsibilities will include developing and implementing DFT flows, working on architecture and IP integration, and ensuring seamless interaction with synthesis and verification processes. You will also be involved in the silicon bring-up process, where you will validate DFT features and ensure their functionality in real-world applications.

What we offer

At Google, you will be part of a dynamic team that values innovation and collaboration. You will have the opportunity to work on groundbreaking technology that impacts millions of users worldwide. We offer competitive compensation and benefits, along with a supportive work environment that encourages professional growth and development. Join us in shaping the future of technology and making a difference in the world.