Empowering the world through technology and information
Google LLC, headquartered in Mountain View, California, is a global leader in internet-related services and products, including its flagship search engine, Google Search, and the Android operating system. With over 100,000 employees, Google also offers cloud computing services through Google Cloud P...
Google offers competitive salaries, equity options, generous PTO policies, comprehensive health benefits, and a remote work policy that allows flexibi...
Google is known for its engineering-first culture, emphasizing innovation and collaboration. The company fosters a unique environment that encourages ...
Google • Sunnyvale, CA, USA
Google is seeking a DFT Engineer to work on cutting-edge TPU technology that powers AI/ML applications. You'll leverage your expertise in DFT architecture and verification, working with industry-standard methodologies and EDA tools. This role requires 3+ years of experience in DFT implementation and verification.
You hold a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, and you have at least 3 years of experience in DFT architecture, implementation, ATPG, and verification for SoCs. Your background includes familiarity with industry-standard test methodologies and platforms such as ATE, MBIST, JTAG, and System Level Test (SLT). You are comfortable working with EDA tools, particularly those from Synopsys and Siemens EDA, and you have a solid understanding of DFT flow, including architecture and IP integration.
You may also have a Master's degree or PhD in a relevant field, which enhances your qualifications. Your experience extends to working with silicon process and technology nodes, focusing on high speed and low power consumption. You are knowledgeable about various fault models, including Stuck-at, Transition, Cell-Aware, and Path Delay, which are crucial for ensuring high test quality in your designs.
In this role, you will shape the future of AI/ML hardware acceleration by driving the development of cutting-edge TPU technology. You will be responsible for inserting DFT logic, including scan chains, MBIST, TAP controllers, and Clock Control blocks, ensuring they are properly integrated into the core architecture. Your work will involve designing and implementing a System Level Test strategy that guarantees the reliability and performance of complex digital designs.
You will collaborate closely with cross-functional teams to verify DFT logic and generate test patterns that meet stringent quality standards. Your contributions will directly impact the innovation behind products that are loved by millions worldwide, as you leverage your design and verification expertise to push the boundaries of custom silicon solutions.
At Google, you will be part of a dynamic team that values innovation and collaboration. You will have the opportunity to work on projects that are at the forefront of technology, contributing to the development of products that shape the future. We encourage you to apply even if your experience doesn't match every requirement, as we value diverse perspectives and backgrounds. Join us in our mission to drive advancements in AI/ML technology and make a meaningful impact in the industry.
Apply now or save it for later. Get alerts for similar jobs at Google.
