SoC Physical Design Engineer, STA/Timing

Who you are

You have a minimum of a BS degree and over 3 years of relevant industry experience in physical design and timing analysis. Your expertise includes working with large design STA and timing closure, which has equipped you with the skills to tackle complex SOC implementations. You possess strong programming skills in Perl and TCL, allowing you to create and maintain scripts and methodologies for analysis and runs. Your hands-on experience in STA makes you a valuable asset to any team focused on timing optimization.

You are familiar with the critical aspects of timing for large designs and understand how to debug constraints effectively. Your ability to collaborate with design teams to facilitate logic changes demonstrates your strong communication skills and your commitment to delivering high-quality results. You thrive in environments where innovation is encouraged, and you are eager to contribute to groundbreaking projects.

Desirable

Experience with timing ECOs for project tapeout is a plus, as is familiarity with best practices in physical design. Your analytical skills allow you to perform deep analysis of timing paths to identify key issues, ensuring that projects meet their deadlines and specifications. You are proactive in creating documentation and guidelines that help streamline processes and improve team efficiency.

What you'll do

In this role, you will be directly responsible for the physical implementation of design partitions from netlist to tapeout for highly complex SOCs. You will work closely with design teams to understand and debug constraints, facilitating logic changes that improve timing. Your collaboration with the Physical Design team will be crucial as you highlight issues and share best practices to enhance project outcomes.

You will help create timing ECOs for project tapeout, ensuring that all necessary adjustments are made to meet project specifications. Your role will also involve creating and maintaining scripts and methodologies for analysis and runs, which will be essential for optimizing the design process. You will document your findings and help establish guidelines and specifications that will benefit the entire team.

Deep analysis of timing paths will be a key part of your responsibilities, as you identify and address critical timing issues that could impact project success. You will implement timing infrastructure that supports the overall design process, ensuring that all components work seamlessly together. Your contributions will directly influence the quality and efficiency of the SOC designs produced by Apple.

What we offer

At Apple, you will be part of a team that values innovation and creativity. We offer a collaborative work environment where your ideas can flourish and make a real impact. You will have the opportunity to work on cutting-edge technologies and contribute to products that redefine industries. We encourage you to apply even if your experience doesn't match every requirement, as we believe in the potential of diverse backgrounds and perspectives.

We provide competitive compensation and benefits, along with opportunities for professional growth and development. Join us in our mission to leave the world better than we found it, and help us deliver the next groundbreaking Apple product.